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h-bridge gate driver with lin transceiver, watchdog, and 5v regulator 1. introduction ata6823 is designed specifically for automot ive applications that require high-power motors. it provides four high-current gate driver outputs capable of driving a wide range of n-channel power mosfets in a full -bridge configuration. a fully integrated charge pump with external capacitors pr ovides the gate voltage for the high-side output stages. ata6823 supports low-speed lin-data communication up to 20 kbaud in compliance with lin specification 2.0 using a built-in lin transceiver. protection features include undervoltage/overvoltage detection and shutdown, overtemperature shutdown, and short circuit detection of motor leads to battery voltage and to ground. shoot-through protection is guaranteed using a dead-time adjustment which can be set by hardware. 2. application board the ata6823 application board allows the running of a dc motor. the supply voltage is 8v to 18v, maximum power of the dc moto r is limited by the external h-bridge mosfets. no microcontroller is implemented on-board. it is possible to control the motor either via an external microcontroller (with or without lin bus), or directly (using the dir and pwm pins). 2.1 features ? header pins x1 to connect to lin bus as well as power supply output and en2 wake-up (see table 2-1 on page 6 ) microcontroller connector interface (see table 2-2 on page 6 ) 4-mm banana plugs to connect power supply bat and gnd (see figure 2-2 on page 3 ) included power dc motor on-board, turn direction indicated by leds vias m+ and m? to conn ect optional dc motor optional connection of exte rnal motor h-bridge (see figure 2-6 on page 8 ) push-button en2 to wake-up ata6823 jumper vmode to select vcc output voltage level jumper rwd to select different wd resistors shunt for dc motor current measurement ata6823 h-bridge gate driver with lin transceiver, watchdog and 5v regulator application note 4961a?auto?01/07
2 4961a?auto?01/07 ata6823 figure 2-1. application board
3 4961a?auto?01/07 ata6823 figure 2-2. ata6823 application board schematic r3 10 k ? r1 470 k ? 10 nf 2.2 f c1 c2 bc817-40 q2 7 pwm 8 en1 9rx 10 dg3 13 ad0 14 pgnd 11 dg2 12 dg1 6 5 4 3 2 dir tx wd /reset gnd 1 vcc x2 + + 10 k ? r2 1k ? r4 (master) pgnd 2.2 f 220 f/ 35v 220 f/35v 2.2 f q1 sum110n06-05l ic1 ata6823 q4 sum110n06-05l c21 10 nf c23 4.7 nf 2 1 4.7 ? r19 c20 4.7 nf 470 k ? r12 10 ? r15 10 ? r13 m- led3 led4 d4 d5 1n4148 1n4148 m+ 4.7 ? r9 q6 sum110n06-05l q5 sum110n06-05l q3 sum110n06-05l l1 v+ pbat...motor pgnd...motor vsup gnd 7 h c3 bas16 d1 gf1g d2 d3 en2 sw1 ll4248 c4 470 nf c12 c8 c7 c9 220 nf c13 470 nf vg en2 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 vbatsw vbat vco pgnd l1 l2 pbat tx dir pwm en1 rx dg3 dg2 dg1 cphi vres s2 s1 h1 h2 jp2 vmode jp1 ferrit l2 rwd 23 1 23 1 6 5 4 3 2 en2 vbatsw vbat lin gnd 1 vcc js1 3 2 1 cplo vmode 5 6 7 8 1 2 3 4 20 19 18 17 24 23 22 21 rwd cc wd lin gnd reset vint c6 c5a 220 f/ 35v vres h1 s1 l2 h2 l1 pbat + 100 nf c11 220 nf c10 2.2 f 100 nf c18 10 nf c19 4.7 nf 470 k ? r11 10 ? r14 10 ? r10 560 ? r23 560 ? r24 c14 330 pf c15 220 pf x1 c25 10 nf 470 k ? r20 c24 10 nf c22 4.7 nf 4.7 ? r18 4.7 ? r8 470 k ? r17 0r01 r22 10 ? r16 10 ? r21 jh1 3 2 1 jh2 3 2 1 js2 3 2 1 6 4 2 5 3 1 xl1 xs1 xh1 xl2 xs2 xh2 jl1 3 2 1 jl2 x3 3 2 1 r6 33 k ? r7 10 k ? r5a n.b. r5b n.b. s2
4 4961a?auto?01/07 ata6823 figure 2-3. ata6823 application board component placement; top side, top view
5 4961a?auto?01/07 ata6823 figure 2-4. ata6823 application board; top side, top view figure 2-5. ata6823 application board; bottom side, top view (as if pcb were transparent)
6 4961a?auto?01/07 ata6823 table 2-1. x1 lin header pins pin symbol description 1 vcc vcc regulator output, voltage le vel depends on jumper jp2 setting 2 gnd ground for chip core 3 lin lin bus terminal 4 vbat ata6823 supply voltage 5 vbatsw 100 ? pmos switch from vbat 6 en2 enable input, 12v logic table 2-2. x2 microcontroller interface header pins pin symbol direction description 1 vcc out vcc regulator output, voltage level depends on jumper jp2 setting 2 gnd - ground for chip core 3 /res out microcontroller reset 4 wd in watchdog trigger signal 5 tx in transmit signal to lin bus from microcontroller 6 dir in defines the rotation direction of the motor 7 pwm in pwm input controls motor speed 8 en1 in keeps the chip in active mode via the microcontroller 9 rx out receive signal from lin bus to microcontroller 10 dg3 out diagnostic output 3 11 dg2 out diagnostic output 2 12 dg1 out diagnostic output 1 13 ad0 out upper level of motor current shunt 14 pgnd out lower level of motor current shunt, gnd sense level table 2-3. x3 ata6823 motor bridge interface pin symbol description 1 xl2 ata6823 pin 26, l2 output to control external h-bridge 2 xl1 ata6823 pin 27, l1 output to control external h-bridge 3 xs2 ata6823 pin 19, s2 output to control external h-bridge 4 xs1 ata6823 pin 17, s1 output to control external h-bridge 5 xh2 ata6823 pin 20, h2 output to control external h-bridge 6 xh1 ata6823 pin 18, h1 output to control external h-bridge
7 4961a?auto?01/07 ata6823 2.2 getting started to run the ata6823 application board, a 8v to 18v supply voltage between vbat and gnd is necessary. to check the board at start up, following voltages are m easurable at 12.5v vbat voltage. after the power supply is switched on, a level of 5v is measurable at vint and the header pin vcc; the vg voltage level is 12.5v and the charge pump voltage vres is 26.5v. the voltage level at resistor rwd is 1.2v. the charge pump capacity voltage level is 5v. the charge pump oscillator frequency is approximately 100 khz. if the watchdog signal is not applied to the pin wd, the pin /reset oscillates with a frequency around 7hz. it is not possible to activate the h-bridge without providing a watchdog. table 2-4. jumper settings jumper symbol description 1rwd watchdog resistor selection upper position 2-3 selects r6 (default) lower position 1-2 selects r5a + r5b r6 is implemented as 33 k ? (customer specific, depending on watchdog requirements) 2vmode vcc regulator output level upper position 2-3 = output level is 3.3v lower position 1-2, set to "1" = output level is 5v (default) 3jh2 upper position 2-3 switches h2 to on-board h-bridge gate q3 (default) lower position 1-2 switches h2 to external connector x3 pin xh2 4 jh1 see jh2 5js2 upper position 2-3 switches s2 to on-board h-bridge motor m? (default) lower position, see jh2 6js1 upper position 2-3 switches s2 to on-board h-bridge motor m+ (default) lower position, see jh2 7 jl2 see jh2 8 jl1 see jh2 table 2-5. push button push button symbol function 1 en2 it is possible to wake up the ata6823 either by lin or by push button en2
8 4961a?auto?01/07 ata6823 2.3 external h-bridge figure 2-6. external h-bridge connection the application board offers the possibility of an external h-bridge connection (see figure 2-6 ). the external h-bridge can be supplied by the 4-mm banana plugs pbat_motor and pgnd_motor. the gate driver and sense pins are avai lable via header pin connector x3 (see table 2-3 on page 6 ). to change between the on-board h-bridge and the external h-bridge, jumpers jh2 to jl1 (see table 2-4 on page 7 ) have to be changed to lower position1-2. 2.4 lin mode figure 2-7. lin master option according to lin specification 2.0, resistor r4 is not necessary when using the ata6823 as slave. this is the default at delivery. to change the ata6823 lin from slave mode to master mode, complying with lin specification 2.0, a 1 k ? resistor has to be inserted in place of r4, and reverse battery protection diode has to be inserted in place of d3.
9 4961a?auto?01/07 ata6823 2.5 microcontroller integration to run the h-bridge, it is necessary to attend the watchdog and pace signal. to operate, a microcontroller can be connected via the header pins x2 (see table 2-2 on page 6 ). all pins which can be connected to the microcontro ller are available on the header pins x2: voltage supply vcc lin interface watchdog motor control pwm and dir lin transceiver diagnostic pins the vcc voltage level can be chosen by the jumper vmode (see table 2-4 on page 7 ). 2.6 current shunt shunt r22 is available to monitor the h-bridge current. the sense lines ad0 and pgnd (see table 2-2 on page 6 ) of the shunt can be connected to the ad converter of the microcontroller. figure 2-8. watchdog resistor placement 2.7 watchdog resistor rwd upper jumper rwd position 2-3 selects the standard watchdog resister value r6 33 k ? . optionally, the watchdog frequency can be changed via resistor r5, by setting jumper rwd to position 1-2. either smd (r5a) or wired (r5b) resistors may be used.
10 4961a?auto?01/07 ata6823 3. application hints 3.1 trigger watchdog to switch ata6823 into operating mode, it is necessary to apply a correct trigger signal to the pin wd. if r1 = r wd =33k ? , a square wave trigger signal of f = 70 hz is required. to adapt the resistor to other values, refer to the datasheet for ata6823, especially the section title reset and watchdog management. the trigger signal has no integrated debouncing circuit. it switches with a rising edge at pin wd. operating mode is shown by permanently high level at pin /reset. a wrong or missing trigger pulse generates a rese t pulse with length of 2 ms. vcc voltage lower than the reset threshold generates a reset pulse for 68 ms. 3.2 enable after power-on, the ata6823 is in run mode. a falling edge at pin en1 switches the device to standby mode. switching ata6823 back to run mode is possible either by switch ing lin to gnd or by switching en2 to vbat. en2 can be switched up to vbat. en1 uses 5v logic and would be destroyed by switching to the vbat level. 3.3 wake-up source recognition diagnostic pin dg1 has a double assignment: until the first watch dog pulse, dg1 shows the wake up source; a high level at pin dg1 indicates that en2 is the wake-up source, while a low level indicates lin was wake-up source. 3.4 diagnostic pins there are three diagnostic pins available to detect errors (see table 3-1 on page 10 ). the ata6823 has neither short-circuit shutdown nor short-circuit limitation. short circuit is indi- cated, handling must be done by the microcontroller. while the outputs are switched on, the voltage levels between the active mosfet sources and drains are monitored. if one volt age level is higher than 4v, dg1 w ill be set to high . after switch- ing the motor bridge, either by pwm or by di r, the sense monitoring is deactivated for 10 s. otherwise inrush or switching curr ents will activate the dg1 warning. supply voltage breakdown at pin pbat under the level of 5.6v is indicated by a high level at pin dg1, without any delay time. table 3-1. diagnostic pins signal description dg1 short circuit dg2 supply monitoring, charge pump dg3 overtemperature warning
11 4961a?auto?01/07 ata6823 the intent is to monitor a dedicated h-bridge power supply. an overvoltage or undervoltage condition at pin vb at will be indicated by a high level at the diagnostic pin dg2. to debounce, a 13-khz low-pass filter is inserted. charge pump voltage lower than v vbat + 4v will be indicated by dg2 set to high, with a debouncing time of 30 s. if overtemperature of higher than 150 c is detected, the pin dg3 is set to high. the occurrence of overtemperature will be latch ed until the next watchdog pulse. if monitoring signals dg2 or dg3 indicate failu re, the ata6823 will switch off the motor bridge. 3.5 motor bridge off when the pwm signal is set to low, both high-side mosfets are switched on to slow the motor down. cruise control guarantees fly back curr ents over the contrary highside n-mosfet. 3.6 inrush current switching a motor load on immediately to 100% duty cycle causes a voltage drop due to the inrush current. this drop depends on the power supply installation. depending on the level of voltage drop, the ata6823 detects short circui ts as described below. a short and proper con- nection between the power supply and application board is essential. use the pwm feature when supplying powerful motors and limiting their starting current. 3.7 output short circuit five different short circuit conditions need to be considered. in the following comments, a static motor clamp will be the clamp which is switched to vbat. this hi gh-side switch is not pwm con- trolled, it is permanent ly on. dynamic motor clamp will be t he low-side clamp switch to gnd, which is controlled by pwm. 1. short between both motor clamps in an ideal short circuit, 2 output switches and 1 inverse polarity protection switch are in serial. in this case, r dson and supply voltage higher than 12 v short circuit will be detected by pin s1 or s2: one of the two drain source voltage drops of the output fets is higher than 4v and will switch dg1 on. if the supply voltage is lower than 12v or the short circuit is not ideal (that is, the drain source voltage drop over both output switches is lower than 4v each) the reservoir capacitor will be discharged. voltage moni toring at pbat will set dg1. the pbat voltage monitoring also will detect failure if pwm duty cycle time is shorter than 10 s , because 10 s is the delay time until short circuit detection. 2. short between static motor clamp and ground for an ideal short circuit and supply volt age higher than 8v, minimum one of the output drops is higher than 4v. the sense pin s1 or s2 will switch the pin dg1. in all other cases, pbat mo nitoring will switch dg1, if pbat falls below 5.6v. 3. short between dynamic clamp (pwm) and ground for an ideal short circuit, supply voltage hi gher than 8v and on duty cycle higher than 10 s, the sense pin s1 or s2 will switch the pin dg1. for non-ideal short circuit or lower supply voltages, pbat monitoring will switch dg1.
12 4961a?auto?01/07 ata6823 there is an 18v zener diode between hx and sx. in case of higher supply voltages and short between dynamic clamp and gnd, the charge pump ca pacity will be discharged over this 18v clamping structure. if voltage at vres minus voltage at pbat is lower than 5v, after 30 s, dg2 will be set and the ou tput switches will be switched off. 4. short between dynamic clamp and supply pin pbat after inverse polarity protection for an ideal short circuit, supply voltage higher than 8v and on duty cycle higher than 10 s causes a voltage drop higher than 4v at leas t across output fet. the sense pins s1 or s2 will switch the pin dg1. during other conditions, pbat monitoring will switch dg1. 5. short between dynamic clamp and supply before inverse polarity protection for on duty cycle higher th an 10 s, sense pin s1 or s2 will switch pin dg1. a short circuit cannot be detected with the diag nostic pins of the ata6823 for a duty cycle shorter than 10 s. usually the motor will not move, and the servo loop will signal deadlock. 4. add-on microcontroller modu le to generate wd and pwm the wd and pwm signals are necessary to ac tivate the ata6823 h-bridge as shown in table 2-2 on page 6 . therefore, the microcontroller module ( figure 4-1 on page 14 , ATA6823-DK2 v1.0), assembled with atmega88, is included. the module works with both ata6823 digital supply voltages, 5v as well as 3.3v. 4.1 watchdog the module generates a trigger signal of approximately f wd = 70hz, which is required in case of the default watchdog resistor r wd =r1=33k ? . 4.2 pwm the module also provides the pwm signal with duty cycle from 0% to 100%, adjustable by speed potentiometer (see table 4-1 ). the pwm frequency of the example program is f pwm =25khz. table 4-1. add-on module operating elements type name function push button ramp1 start ramp release dg1 signals: short circuit push button ramp2 stop ramp release dg2 signals: charge pump, overvoltage/undervoltage detection push button ramp3 switch system into sleep mode switch direction left ? off ? right potentiometer speed pwm frequency
13 4961a?auto?01/07 ata6823 4.3 operating functions the microcontroller module is turnable via operating elements as described in table 4-1 on page 12 . two different operating modes are available: 1. manual mode: rotation direction is selected using the direction switch, and the generated pwm frequency responds to the pwm potentiometer. 2. automatic ramp mode: pressing push button ramp1 causes a triangle-duty-cycle pwm curve to be generated. the low value is zero, the maximum value is the set value of the speed potentiometer. the ramp will be stopped by pressi ng push button ramp2. 4.4 sleep mode push button ramp3 is defined to switch ata6823 into standby mode. the microcontroller will no longer be supplied with vcc voltage. system wake-up can only be triggered by ata6823. either ground level on the lin bus or push button en2 wakes up the ata6823. the controller is supplied again and begins to work. 4.5 diagnosis if a short circuit is indicated by diagnosis pin dg1, the microcontroller will switch off the h-bridge immediately. turning it on again is locked. push button ramp1 controls the unlock function. dg2 voltage diagnosis also causes the switching of f of the gate driver. to release, use push but- ton ramp2. overtemperature dg3 warning is indicated in the display, the h-bridge stops. the overtemperature signaling is not latched, after cooling down the signal disappears, the h-bridge starts running again.
14 4961a?auto?01/07 ata6823 figure 4-1. add-on atmega88 module ATA6823-DK2 v1.0 for generating wd and pwm for further information please refer to the datasheet for the ata6823. 5 6 7 8 3 4 1 6 5 9 8 7 2 1 4 3 13 14 10 11 12 17 18 15 16 2 20 19 18 17 22 21 pd3 pd4 gnd(5) gnd(3) vcc(6) pb6 pb7 vcc4 pc1 pc0 adc7 adc6 avcc pb5 gnd(21) aref 24 23 10 c1 100 nf c3 c4 c2 100 nf 100 nf 10 h 100 nf s4 vcc pd3 pc1 adc6 pc0 pb5 vcc 4 3 1 ado adc6 s3 vcc vcc 1 10 isp xisp1 1 vcc nres wd tx dir pwm en1 rx dg3 vcc pb5 pc6 nres vcc bc817-40 en1 9 12 11 14 13 16 15 31 32 29 30 27 28 25 26 pc4 pd0 pd1 pd2 pc5 r3 q1 4.7 k ? r5 r6 39 k ? r2 10 k ? r1 39 k ? 10 k ? r4 18 ? r7 2.5 k ? pc6/nrst pc2 pc3 dg3 dir wd bwm dg2 dg1 pb4 pb3 pc4 rx tx pc2 pc3 pb2 pd7 pd6 pd5 pb1 pb0 pb4 l1 pb3 vss vcc pd3 pc4 vdd vee rs(sc) r/w(sid) e(sclk) d0(sod) d2 d1 c a res nc d7(d3) d6(d2) d5(d1) d3 d4(d0) pc3 pc2 pc1 pc0 lcd1 display dg2 1 2 3 x2b x2 pb4 pc6 pb5 vcc pb3 4 dg1 ado 4 3 1 s2 pb4 4 3 1 s1 pb3
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